Distributed Embedded Systems - Validation Strategies by Matthias Dyer

By Matthias Dyer

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We assume that all valid architectures are able to provide the functionality. However, the architecture has an impact on the execution and communication delay. We thus use the delay as functionality criterion. • For the battery lifetime to be independent of the particular battery type, we use the average system power consumption as a quantitative measure. • As a measure of a system’s wearability, a weighted sum of the wearability factors of all components is used. This allows a flexible inclusion of different criteria while providing a single quantitative value, which can be easily handled in the optimization process.

46 Chapter 3. FPGA Emulation and Virtualization of Hardware Tasks dynamic task 4 dynamic task 3 dynamic task 2 Memory dynamic task 1 Reconfigurable Hardware static logic GeneralPurpose Computing Unit Wireless Radio Sensor/Actor Interface interconnect logic Fig. 15: Structural floorplan of the reconfigurable hardware: Example with four reconfigurable tasks. • What are the interfaces between two tasks and between a task and the I/O? Defining a partially reconfigurable multi-tasking system is a difficult task.

These performance figures have been gathered by combining the measured numbers of executed instructions of the tasks with assumed values for R or Dmax as listed in Table 1. The results show the diverse requirements of the different application types. Note that the ranges have been intentionally set large to cover a wide variety of scenarios. 2 Information Flow The information flow specification is based on the fact that every possible input/output signal is associated with a particular input/output task of the usage profile, e.

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